? semiconductor components industries, llc, 2000 march, 2000 rev. 8 1 publication order number: mc74HC14A/d
highperformance silicongate cmos the mc74HC14A is identical in pinout to the ls14, ls04 and the hc04. the device inputs are compatible with standard cmos outputs; with pullup resistors, they are compatible with lsttl outputs. the hc14a is useful to asquare upo slow input rise and fall times. due to hysteresis voltage of the schmitt trigger, the hc14a finds applications in noisy environments. ? output drive capability: 10 lsttl loads ? outputs directly interface to cmos, nmos and ttl ? operating voltage range: 2 to 6v ? low input current: 1 m a ? high noise immunity characteristic of cmos devices ? in compliance with the jedec standard no. 7a requirements ? chip complexity: 60 fets or 15 equivalent gates logic diagram y1 a1 a2 a3 a4 a5 a6 y2 y3 y4 y5 y6 1 3 5 9 11 13 2 4 6 8 10 12 y = a pin 14 = v cc pin 7 = gnd pinout: 14lead packages (top view) 13 14 12 11 10 9 8 2 1 34567 v cc a6 y6 a5 y5 a4 y4 a1 y1 a2 y2 a3 y3 gnd device package shipping ordering information mc74HC14An pdip14 2000 / box mc74HC14Ad soic14 http://onsemi.com 55 / rail mc74HC14Adr2 soic14 2500 / reel marking diagrams a = assembly location wl or l = wafer lot yy or y = year ww or w = work week mc74HC14Adt tssop14 96 / rail mc74HC14Adtr2 tssop14 2500 / reel tssop14 dt suffix case 948g hc 14a alyw 1 14 1 14 pdip14 n suffix case 646 mc74HC14An awlyyww soic14 d suffix case 751a 1 14 hc14a awlyww l h function table inputs outputs a h l y www.datasheet.co.kr datasheet pdf - http://www..net/
mc74HC14A http://onsemi.com 2 ??????????????????????? ??????????????????????? maximum ratings* ???? ???? symbol ?????????????? ?????????????? parameter ????? ????? value ??? ??? unit ???? ???? v cc ?????????????? ?????????????? dc supply voltage (referenced to gnd) ????? ????? 0.5 to + 7.0 ??? ??? v ???? ???? v in ?????????????? ?????????????? dc input voltage (referenced to gnd) ????? ????? 0.5 to v cc + 0.5 ??? ??? v ???? ???? v out ?????????????? ?????????????? dc output voltage (referenced to gnd) ????? ????? 0.5 to v cc + 0.5 ??? ??? v ???? ???? i in ?????????????? ?????????????? dc input current, per pin ????? ????? 20 ??? ??? ma ???? ???? i out ?????????????? ?????????????? dc output current, per pin ????? ????? 25 ??? ??? ma ???? ???? i cc ?????????????? ?????????????? dc supply current, v cc and gnd pins ????? ????? 50 ??? ??? ma ???? ? ?? ? ???? p d ?????????????? ? ???????????? ? ?????????????? power dissipation in still air, plastic dip2 soic package2 tssop package2 ????? ? ??? ? ????? 750 500 450 ??? ? ? ? ??? mw ???? ???? t stg ?????????????? ?????????????? storage temperature range ????? ????? 65 to + 150 ??? ??? c ???? ? ?? ? ???? t l ?????????????? ? ???????????? ? ?????????????? lead temperature, 1 mm from case for 10 seconds plastic dip, soic or tssop package ????? ? ??? ? ????? 260 ??? ? ? ? ??? c *maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to the recommended operating conditions. 2derating e plastic dip: 10 mw/ c from 65 to 125 c soic package: 7 mw/ c from 65 to 125 c tssop package: 6.1 mw/ c from 65 to 125 c for high frequency or heavy load considerations, see chapter 2 of the on semiconductor highspeed cmos data book (dl129/d). recommended operating conditions ???? ???? symbol ?????????????? ?????????????? parameter ??? ??? min ??? ??? max ??? ??? unit ???? ???? v cc ?????????????? ?????????????? dc supply voltage (referenced to gnd) ??? ??? 2.0 ??? ??? 6.0 ??? ??? v ???? ???? v in , v out ?????????????? ?????????????? dc input voltage, output voltage (referenced to gnd) ??? ??? 0 ??? ??? v cc ??? ??? v ???? ???? t a ?????????????? ?????????????? operating temperature range, all package types ??? ??? 55 ??? ??? + 125 ??? ??? c ???? ? ?? ? ? ?? ? ???? t r , t f ?????????????? ? ???????????? ? ? ???????????? ? ?????????????? input rise/fall time v cc = 2.0 v (figure 1) v cc = 4.5 v v cc = 6.0 v ??? ? ? ? ? ? ? ??? 0 0 0 ??? ? ? ? ? ? ? ??? no limit* no limit* no limit* ??? ? ? ? ? ? ? ??? ns *when v in = 50% v cc , i cc > 1ma this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance cir- cuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open. www.datasheet.co.kr datasheet pdf - http://www..net/
mc74HC14A http://onsemi.com 3 dc characteristics (voltages referenced to gnd) v cc guaranteed limit symbol parameter condition v cc v 55 to 25 c 85 c 125 c unit v t+ max maximum positivegoing input threshold voltage (figure 3) v out = 0.1v |i out | 20 m a 2.0 3.0 4.5 6.0 1.50 2.15 3.15 4.20 1.50 2.15 3.15 4.20 1.50 2.15 3.15 4.20 v v t+ min minimum positivegoing input threshold voltage (figure 3) v out = 0.1v |i out | 20 m a 2.0 3.0 4.5 6.0 1.0 1.5 2.3 3.0 0.95 1.45 2.25 2.95 0.95 1.45 2.25 2.95 v v t max maximum negativegoing input threshold voltage (figure 3) v out = v cc 0.1v |i out | 20 m a 2.0 3.0 4.5 6.0 0.9 1.4 2.0 2.6 0.95 1.45 2.05 2.65 0.95 1.45 2.05 2.65 v v t min minimum negativegoing input threshold voltage (figure 3) v out = v cc 0.1v |i out | 20 m a 2.0 3.0 4.5 6.0 0.3 0.5 0.9 1.2 0.3 0.5 0.9 1.2 0.3 0.5 0.9 1.2 v v h max note 2 maximum hysteresis voltage (figure 3) v out = 0.1v or v cc 0.1v |i out | 20 m a 2.0 3.0 4.5 6.0 1.20 1.65 2.25 3.00 1.20 1.65 2.25 3.00 1.20 1.65 2.25 3.00 v v h min note 2 minimum hysteresis voltage (figure 3) v out = 0.1v or v cc 0.1v |i out | 20 m a 2.0 3.0 4.5 6.0 0.20 0.25 0.40 0.50 0.20 0.25 0.40 0.50 0.20 0.25 0.40 0.50 v v oh minimum highlevel output voltage v in v t min |i out | 20 m a 2.0 4.5 6.0 1.9 4.4 5.9 1.9 4.4 5.9 1.9 4.4 5.9 v v in v t min |i out | 2.4ma |i out | 4.0ma |i out | 5.2ma 3.0 4.5 6.0 2.48 3.98 5.48 2.34 3.84 5.34 2.20 3.70 5.20 v ol maximum lowlevel output voltage v in v t+ max |i out | 20 m a 2.0 4.5 6.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 v v in v t+ max |i out | 2.4ma |i out | 4.0ma |i out | 5.2ma 3.0 4.5 6.0 0.26 0.26 0.26 0.33 0.33 0.33 0.40 0.40 0.40 i in maximum input leakage current v in = v cc or gnd 6.0 0.1 1.0 1.0 m a i cc maximum quiescent supply current (per package) v in = v cc or gnd i out = 0 m a 6.0 1.0 10 40 m a 1. information on typical parametric values along with frequency or heavy load considerations can be found in chapter 2 of the o n semiconductor highspeed cmos data book (dl129/d). 2. v h min > (v t+ min) (v t max); v h max = (v t+ max) (v t min). www.datasheet.co.kr datasheet pdf - http://www..net/
mc74HC14A http://onsemi.com 4 ac characteristics (c l = 50pf, input t r = t f = 6ns) v cc guaranteed limit symbol parameter v cc v 55 to 25 c 85 c 125 c unit t plh , t phl maximum propagation delay, input a or b to output y (figures 1 and 2) 2.0 3.0 4.5 6.0 75 30 15 13 95 40 19 16 110 55 22 19 ns t tlh , t thl maximum output transition time, any output (figures 1 and 2) 2.0 3.0 4.5 6.0 75 27 15 13 95 32 19 16 110 36 22 19 ns c in maximum input capacitance 10 10 10 pf note: for propagation delays with loads other than 50 pf, and information on typical parametric values, see chapter 2 of the on semiconductor highspeed cmos data book (dl129/d). typical @ 25 c, v cc = 5.0 v c pd power dissipation capacitance (per inverter)* 22 pf * used to determine the noload dynamic power consumption: p d = c pd v cc 2 f + i cc v cc . for load considerations, see chapter 2 of the on semiconductor highspeed cmos data book (dl129/d). figure 1. switching waveforms gnd v cc output y input a c l * *includes all probe and jig capacitance test point 90% 50% 10% t tlh device under test output figure 2. test circuit t thl 90% 50% 10% t plh t phl t f t r www.datasheet.co.kr datasheet pdf - http://www..net/
mc74HC14A http://onsemi.com 5 v h typ figure 3. typical input threshold, v t+ , v t versus power supply voltage figure 4. typical schmitttrigger applications v cc , power supply voltage (volts) 23456 1 2 3 4 v t , typical input threshold voltage (volt s v h typ = (v t+ typ) (v t typ) (v t+ ) (v t ) v h v in v out v cc v t+ v t gnd v oh v ol v h v in v out v cc v t+ v t gnd v oh v ol (a) a schmitttrigger squares up inputs with slow rise and fall times (b) a schmitttrigger offers maximum noise immunity y a www.datasheet.co.kr datasheet pdf - http://www..net/
mc74HC14A http://onsemi.com 6 package dimensions pdip14 n suffix case 64606 issue l notes: 1. leads within 0.13 (0.005) radius of true position at seating plane at maximum material condition. 2. dimension l to center of leads when formed parallel. 3. dimension b does not include mold flash. 4. rounded corners optional. 17 14 8 b a f hg d k c n l j m seating plane dim min max min max millimeters inches a 0.715 0.770 18.16 19.56 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 f 0.040 0.070 1.02 1.78 g 0.100 bsc 2.54 bsc h 0.052 0.095 1.32 2.41 j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l 0.300 bsc 7.62 bsc m 0 10 0 10 n 0.015 0.039 0.39 1.01 soic14 d suffix case 751a03 issue f notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t t f r x 45 seating plane d 14 pl k c j m dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019 www.datasheet.co.kr datasheet pdf - http://www..net/
mc74HC14A http://onsemi.com 7 package dimensions tssop14 dt suffix case 948g01 issue o dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane w. s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l u seating plane 0.10 (0.004) t ?? ?? section nn detail e j j1 k k1 detail e f m w 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t v 14x ref k n n www.datasheet.co.kr datasheet pdf - http://www..net/
mc74HC14A http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent r ights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into t he body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1418549 phone : 81357402745 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc74HC14A/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (mf 1:00pm to 5:00pm munich time) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (mf 1:00pm to 5:00pm toulouse time) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (mf 12:00pm to 5:00pm uk time) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, england, ireland www.datasheet.co.kr datasheet pdf - http://www..net/
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